The process for producing an integrated circuit comprises many steps. Conventionally, a logic design is followed by a circuit design, which is followed by a layout design. With respect to the circuit design and layout portion, once circuits for an integrated circuit have been designed, such designs are converted to a physical representation known as a “circuit layout” or “layout.” Layout is exceptionally important to developing a working design as it affects many aspects, including, but not limited to, signal noise, signal time delay, resistance, cell area, and parasitic effect.
Once a circuit is designed and laid out, it is often simulated to ensure performance criteria are met, including, but not limited to, signal timing. This type of analysis is difficult at the outset, and is made more difficult by an embedded design. An embedded design or embedded circuit is conventionally designed separately from an integrated circuit in which it is embedded. Sometimes this embedded circuit is referred to an intellectual property (IP) core or embedded core. This is because the information to build and test such an embedded circuit is provided from one company to another.
An IP core may have a certain maximum timing performance for input and output. For example, a microprocessor will have certain maximum timing performance for input and output of data and other information to a memory, or more particularly, a memory controller. In personal computer manufacture, operation of memory, or more particular memory modules, is specified for a bus “speed,” such as 33 MHz, 66 MHz, and so on. Presently, the Rambus Signaling Level road map is for a memory to processor bus frequency of 1.2 GHz. However, processors presently operate at speeds in excess of 1.2 GHz, and thus processors must be slowed down for communicating with memory. Moreover, memory is speed graded, and conventionally slower memory costs less than faster memory.
However, there is not de facto standard bus interface for an embedded microprocessor. Accordingly, glue or gasket logic and/or interconnects are used to couple an embedded microprocessor to a host device, such as a programmable logic device. Programmable logic devices exist as a well-known type of integrated circuits that may be programmed by a user to perform specified logic functions. There are different types of programmable logic devices, such as programmable logic arrays (PLAs) and complex programmable logic devices (CPLDs). One type of programmable logic devices, called a field programmable gate array (FPGA), is very popular because of a superior combination of capacity, flexibility and cost.
Accordingly, it would be desirable and useful to provide method and apparatus for timing performance analysis for an embedded device.